Rivos Systems UK
"Rivos is developing industry-leading server solutions that combine power efficiency, high performance, and security, built on RISC-V and designed with workload-defined hardware." Rivos Inc
Our Scholarships
Placement Location
Cambridge
Type of Placements Offered
• 12-month placements • Summer placements also offered (following completion of a 12-month placement)
Restrictions/Notes
(1) Requires 12-month placement for 2025/26. Additional summer placements in later years also offered; (2) No first year students; (3) Knowledge/experience of computer architecture is an advantage
2024/25 Scholarships
One new scholarship
Who we are and what we do
Founded by technical leaders from Google, Intel, and Apple, backed by leading Silicon Valley investors, with a slogan “RISC-V and Open Source,” Rivos Inc is an early-stage startup. We aim to integrate high performance, power-efficient software and hardware designs for server applications such as heavy data crunching and data analytics.
Rivos supports the intense requirements of the large language models and data analytics that will remake the enterprise, by providing the full solution of optimized chips combining RISC-V CPUs and a Data Parallel Accelerator, a reference multi-chip OCP modular server, and a full firmware-to-application open software stack. Customer workloads are easily deployed using their existing models giving an immediate TCO benefit.
Headquartered in Santa Clara, CA, with offices in the USA, UK, EU and Asia.
What you could be doing during your work placement
The Rivos DPA Performance team is responsible for defining performance features for the best-in-class RISCV based systems. An internship position is available to those that seek to grow their skills and work on the next generation of Parallel Programmable Accelerators.
As a Performance Modeling intern, you will get to work on a project that will involve some combination of the following:
- Microarchitecture exploration, research, and experimentation
- Correlation between the RTL and performance models, RTL performance debug
- Workload analysis and software optimization involving compilers, libraries, numerics, and other software
- Development of data analysis, visualization, and debug tools, as well as the development of test benches
- Architecture and microarchitecture knowledge on CPUs
- Strong C/C++ programming and debugging skills
- Proficiency in scripting languages such as Perl, Python
- Experience with performance modeling simulators is a plus
- Understanding of performance benchmarks and workloads
- Knowledge of SystemVerilog and RTL waveform debugging tools will be a bonus
- Excellent skills in problem-solving, written and verbal communication
- Highly self-motivated
- Ability to work well in a team and be productive under aggressive schedules